
Senior Mask Layout Design Engineer
At NVIDIA, we are looking for a Senior Mask Layout Design Engineer who is passionate about advancing the capabilities of our groundbreaking technologies. We are looking for a highly motivated individual who is eager to take on complex challenges in a fast-paced environment and deliver solutions that will impact the future of our industry.The Senior Mask Layout Design Engineer will be responsible for the design of complex digital and analog masks, ensuring that all designs are optimized for speed, power, area, and performance. This position requires a strong understanding of design and layout techniques, as well as the ability to work closely with foundries, process engineers, and other stakeholders to ensure that designs meet all requirements.The ideal candidate will have a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field, and 5+ years of experience in the design of complex digital and analog masks. They should have strong knowledge of design and layout techniques, including the use of EDA tools for layout, DRC, and LVS. In addition, the successful candidate will possess excellent communication and organizational skills, and have the ability to work independently and collaboratively with other stakeholders.
Responsibilities:
- Design complex digital and analog masks, ensuring that designs are optimized for speed, power, area, and performance.
- Work closely with foundries, process engineers, and other stakeholders to ensure that designs meet all requirements.
- Utilize EDA tools for layout, DRC, and LVS.
- Communicate and collaborate with other stakeholders.
- Work independently to meet objectives.
- Maintain a strong understanding of design and layout techniques.
- Monitor industry trends and ensure that designs are up to date.
- Proactively seek out and suggest improvements to the mask layout design process.
Etc)
Synopsys
Ability To Work Independently And In A Team Environment
Computer Science/Electrical Engineering Degree
+ Years Of Experience In Digital Ic Layout
Deep Understanding Of Tsmc's Process Technology
Knowledge Of Eda Tools (Cadence
Calibre
Experienced In Mask Layout For High-Speed Memory And Io Circuits
Familiar With Design-For-Test And Design-For-Yield Techniques
Solid Understanding Of Design Rules And Correction Flows
Excellent
Problem Solving
Scripting
CAD
Verification
IC Design
PCB design
Process optimization
Team collaboration
Lithography
D Modeling
Opc
Gdsii
Mask Layout
Design Rules
Rule-Based Layout
Semiconductor Experience
Communication
Conflict Resolution
Leadership
Time management
Interpersonal Skills
creativity
Critical thinking
Teamwork
Adaptability
Problem-Solving
According to JobzMall, the average salary range for a Senior Mask Layout Design Engineer in Santa Clara, CA, USA is between $100,000 - $140,000. This range may vary depending on factors such as experience, education, and the specific employer.
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NVIDIA Corp. designs and manufactures computer graphics processors, chipsets, and related multimedia software. The company operates through two segments: Graphics Processing Unit and Tegra Processor. The Graphics Processing Unit segment includes sales of the company's GeForce discrete and chipset products that supports desktop and notebook PCs plus license fees from Intel and sales of memory products. The Tegra Processors segment provides processors that deliver superior visual and multimedia experience on tablets, smart phones and gaming devices while consuming minimal power.

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