NVIDIA

Senior ASIC Engineer - Design-For-Test

NVIDIA

Santa Clara, CA, USA
Full-TimeDepends on ExperienceSenior LevelMasters
Job Description

Are you a highly skilled Senior ASIC Engineer with a passion for pushing the boundaries of technology? Do you have a strong background in Design-For-Test methodologies and experience working with cutting-edge hardware? If so, NVIDIA is looking for you to join our team as a Senior ASIC Engineer - Design-For-Test. In this role, you will have the opportunity to work on the latest and most advanced graphics processing units, helping to ensure their functionality and reliability through your expertise in DFT. As a key member of our engineering team, you will play a critical role in the development of our next-generation products. If you are ready to take on new challenges and make a significant impact in the world of high-performance computing, we encourage you to apply for this exciting opportunity at NVIDIA.

  1. Develop and implement Design-For-Test strategies for advanced graphics processing units (GPUs).
  2. Collaborate with cross-functional teams to ensure DFT requirements are met in all stages of product development.
  3. Design and implement DFT features for complex ASIC designs.
  4. Develop and execute DFT verification plans and debug DFT-related issues.
  5. Utilize industry standard DFT methodologies and tools to achieve high quality and efficient testing.
  6. Analyze and optimize DFT coverage to ensure the reliability and functionality of the ASIC.
  7. Lead DFT reviews and provide guidance to junior engineers.
  8. Stay updated on the latest DFT techniques and technologies and incorporate them into product designs.
  9. Work closely with hardware and software teams to define and implement test processes and procedures.
  10. Analyze and report DFT data to stakeholders and make recommendations for improvements.
  11. Troubleshoot and resolve DFT issues in a timely and efficient manner.
  12. Participate in ASIC tape-out activities and support post-silicon debug efforts.
  13. Mentor and guide junior engineers in DFT methodologies and best practices.
  14. Continuously contribute to the improvement of DFT processes and methodologies within the organization.
  15. Represent the company at industry events and conferences to showcase DFT expertise and stay updated on industry trends.
Where is this job?
This job is located at Santa Clara, CA, USA
Job Qualifications
  • Extensive Experience In Dft Methodologies: A Senior Asic Engineer At Nvidia Must Have A Deep Understanding Of Various Dft Techniques, Such As Scan, Boundary Scan, Memory Bist, And Functional Test, To Ensure High-Quality Design And Testing Of Complex Asics.

  • Expertise In Industry-Standard Dft Tools: The Candidate Must Have A Strong Background In Using Industry-Standard Dft Tools Like Synopsys Tetramax, Mentor Tessent, Or Cadence Encounter Test To Develop And Implement Dft Architectures For High-Performance Asic Designs.

  • Proven Track Record In Developing Dft Architectures: A Senior Asic Engineer Must Have A Successful Track Record Of Designing And Implementing Efficient Dft Architectures For Large-Scale Asics, Meeting Tight Timing And Power Constraints.

  • Strong Understanding Of Design Principles And Methodologies: The Candidate Must Have A Thorough Understanding Of Rtl Design And Verification Methodologies, Along With A Good Understanding Of Digital Design Principles, To Ensure Efficient Dft Implementation.

  • Excellent Problem-Solving And Communication Skills: As A Senior Engineer, The Candidate Must Possess Excellent Problem-Solving Skills And Be Able To Communicate Effectively With Cross-Functional Teams To Drive Dft Strategies, Resolve Issues, And Meet Project Deadlines.

Required Skills
  • Synthesis

  • Test methodology

  • Asic Design

  • Debug

  • Timing Constraints

  • Scan Insertion

  • Atpg

  • Fault Modeling

  • Testbench Development

  • Digital Logic

  • Verification Techniques

  • Boundary Scan

Soft Skills
  • Communication

  • Conflict Resolution

  • Emotional Intelligence

  • Leadership

  • Time management

  • creativity

  • flexibility

  • Teamwork

  • Adaptability

  • Problem-Solving

Compensation

According to JobzMall, the average salary range for a Senior ASIC Engineer - Design-For-Test in Santa Clara, CA, USA is $135,000-$155,000 per year. This may vary depending on factors such as experience, education, and the specific company or industry.

Additional Information
NVIDIA is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. We do not discriminate based upon race, religion, color, national origin, sex, sexual orientation, gender identity, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics.
Required LanguagesEnglish
Job PostedJuly 15th, 2024
Apply BeforeAugust 19th, 2025
This job posting is from a verified source. 
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About NVIDIA

NVIDIA Corp. designs and manufactures computer graphics processors, chipsets, and related multimedia software. The company operates through two segments: Graphics Processing Unit and Tegra Processor. The Graphics Processing Unit segment includes sales of the company's GeForce discrete and chipset products that supports desktop and notebook PCs plus license fees from Intel and sales of memory products. The Tegra Processors segment provides processors that deliver superior visual and multimedia experience on tablets, smart phones and gaming devices while consuming minimal power.

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