
Failure Analysis Engineer
Failure Analysis Fault Isolation (FAFI). In this career growth-oriented Product Development Engineering position, you will be supporting FAFI and silicon debug of FPGA/custom ASIC products on the latest silicon process technology. Responsible for hands-on FAFI, silicon debug readiness and development of advanced tools/processes thru innovation and collaboration with internal and external developers/suppliers. Close interaction and communication with Component Debug and fab teams would be required in accomplishing results. The candidate will work closely with the component debug and circuit design team to debug complex silicon issues.
5+ years of experience in Advanced CMOS VLSI circuits electronics device physics and Fab process flows
Ability to read and interpret advance level circuit schematics and IC layout
Data Analysis
Debugging skills
Time Management Skills
Failure analyses analytical tools operation
Agile Lean manufacturing
Self-Driven
Problem-solving and resourcefulness
Flexibility/Adaptability
Detail oriented and highly organized
Process Oriented
Verbal and Written Communication
According to JobzMall, the average salary range for a Failure Analysis Engineer in 101 Innovation Dr, San Jose, CA 95134, USA is $70,000 to $95,000 per year. This range is based on the salaries reported by job seekers who have similar job titles, as well as the salaries posted by employers on the job site.
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Intel Corp. engages in the design, manufacture, and sale of computer products and technologies. It delivers computer, networking, and communications platforms. It operates its business through the following segments: Client Computing Group, Data Center Group, Internet of Things Group, Non-Volatile Memory Solutions Group, Intel Security Group, and Programmable Solutions.

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