Static Timing Analysis Engineer
Are you a detail-oriented and analytical individual with a passion for designing cutting-edge technology? IBM is seeking a skilled Static Timing Analysis Engineer to join our team. As a member of our dynamic team, you will have the opportunity to work on advanced semiconductor designs and contribute to the development of innovative products for our clients. If you have a strong background in static timing analysis and a desire to work in a fast-paced and challenging environment, we want to hear from you. Join us at IBM and be a part of shaping the future of technology.
- Conduct static timing analysis for advanced semiconductor designs to ensure timing requirements are met.
- Collaborate with cross-functional teams to resolve timing-related issues and provide technical guidance.
- Utilize industry-standard tools and methodologies to perform timing closure and optimize design performance.
- Develop and maintain timing constraints for complex designs.
- Analyze and troubleshoot timing violations and propose solutions.
- Stay updated on emerging technologies and industry trends related to static timing analysis.
- Communicate timing analysis results and recommendations to project stakeholders.
- Identify and implement process improvements to increase efficiency and accuracy in timing analysis.
- Participate in design reviews and provide technical input on timing-related topics.
- Document and maintain accurate and organized records of timing analysis results and methodologies.
- Mentor and train junior team members on static timing analysis techniques.
- Adhere to project timelines and deliverables, ensuring timely completion of all assigned tasks.
- Adhere to company policies and procedures regarding design and documentation standards.
- Continuously seek opportunities for professional development and growth within the field of static timing analysis.
Strong Knowledge Of Static Timing Analysis (Sta) Methodologies And Tools, Such As Primetime And Icc, With At Least 3 Years Of Experience In Using These Tools.
Proficiency In Verilog, Vhdl, And Other Hardware Description Languages (Hdls) For Writing And Debugging Timing Constraints And Timing Models.
In-Depth Understanding Of Asic Design Flow And Experience With Industry-Standard Design Methodologies, Such As Rtl-To-Gdsii Flow.
Familiarity With Industry Standard Libraries And Timing Models, And Ability To Create Custom Timing Models For Non-Standard Cells.
Excellent Problem-Solving Skills And Ability To Work In A Fast-Paced, Dynamic Environment With Tight Deadlines.
Circuit Simulation
Signal Integrity
Timing Closure
Clock Domain Crossing
Design Optimization
Timing Analysis
Delay Calculation
Clock Skew Analysis
Sta Tools
Sdc Constraints
Data Path Analysis
Communication
Conflict Resolution
Leadership
Time management
creativity
Attention to detail
Teamwork
Adaptability
Problem-Solving
Empathy
According to JobzMall, the average salary range for a Static Timing Analysis Engineer in Bengaluru, Karnataka, India is between ₹ 5-10 lakhs per annum. However, the salary may vary based on factors such as experience, skills, and company size.
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International Business Machines Corporation is an American multinational information technology company headquartered in Armonk, New York, with operations in over 170 countries.
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