Design Verification Engineer
Define the success criteria for verification of IP blocks. Creatively solve verification requirements with the right tool i.e. UVM bench, System Verilog bench or lab testing with firmware testing. Creating the test bench and test cases to meet all verification requirements. Articulate and compare alternative approaches. Strong problem-solving skills and ability to direct the design team toward the problematic area of the design. Challenge the validity of given procedures and processes to enhance, improve and develop complementary adjustments and solutions. Utilize skills to apply Random/Deterministic Verification Principles and knowledge of engineering principles. Participate in overall departmental program planning.
8+ years of experience in Design Verification and System Verilog.
8+ years demonstrating experience in writing UVM test benches and verifying coverage.
Self-Starter, ready to move quickly to keep the Design moving forward.
Driving projects with RTL/HW engineers.
Python
Agile development
Time Management Skills
Cadence VManager
Verification and Testing skills
Writing UVM test benches
Driven and self-motivated
Prioritizing skills
Adaptability
Problem Solving Skills
Detail Oriented and Organized
Verbal and Written Communication
Multi tasker
According to JobzMall, the average salary range for a Design Verification Engineer in 1 Old Orchard Rd, Armonk, NY 10504, USA is $100,000-$130,000 per year. This salary range can vary depending on the experience and qualifications of the individual.
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International Business Machines Corporation is an American multinational information technology company headquartered in Armonk, New York, with operations in over 170 countries.
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