Digital ASIC Design Engineer

Develop architecture specifications to meet marketing and system requirements. Analyze design tradeoffs such as die size, power, leakage, schedule, resources, etc. Develop RTL (Verilog or VHDL), timing constraints, and detailed documentation. Perform Spyglass/Lint checks for CDC, DFT, etc. Support synthesis, STA, and logic equivalency checks. Implement ECOs. RTL & gate level simulations. Create verification & silicon validation plans. Silicon bring up, validation, and debugging. Scripting with TCL, Perl, and Unix shell scripts. Develop production ATE tests, support yield improvement and failure analysis. Report progress to the team leader on a regular basis.

According to JobzMall, the average salary range for a Digital ASIC Design Engineer in 1320 Ridder Park Dr, San Jose, CA 95131, USA is between $111,500 and $134,500 per year. This range may vary depending on experience, the company, and the specific job duties.

Broadcom Inc. is an American designer, developer, manufacturer and global supplier of a wide range of semiconductor and infrastructure software products, Broadcom's product portfolio serves the data center, networking, software, broadband, wireless, and storage and industrial markets.