Are you a highly skilled and motivated engineer with a passion for designing and verifying complex ASICs? Do you thrive in a fast-paced environment and enjoy solving challenging problems? If so, Broadcom is seeking an experienced ASIC Design Verification Engineer to join our team. In this role, you will be responsible for ensuring the functionality and performance of our cutting-edge ASIC designs. If you have a strong background in ASIC verification and a desire to work with the latest technologies, we encourage you to apply.
- Develop and maintain comprehensive verification plans for complex ASIC designs.
- Utilize advanced verification methodologies and tools to ensure the accuracy and completeness of ASIC designs.
- Collaborate with design and architecture teams to understand design specifications and develop verification strategies.
- Design and implement test benches, test cases, and coverage models to verify the functionality and performance of ASIC designs.
- Identify and debug issues in the design and work with the design team to implement fixes.
- Develop and execute simulation and emulation tests to validate the functionality and performance of ASIC designs.
- Analyze and report on verification results, identify areas for improvement, and implement necessary changes.
- Utilize industry best practices and techniques to continuously improve the verification process.
- Keep up-to-date with the latest verification methodologies, tools, and technologies to drive innovation and efficiency.
- Mentor and provide technical guidance to junior verification engineers.
- Collaborate with cross-functional teams to ensure timely delivery of verified ASIC designs.
- Communicate effectively with team members, management, and other stakeholders to provide updates on verification progress and issues.
Bachelor's Or Master's Degree In Electrical Engineering Or Computer Science.
Minimum Of 3-5 Years Of Experience In Asic Design Verification.
Strong Knowledge And Experience With Industry-Standard Verification Methodologies Such As Uvm.
Proficiency In Hdl Languages Such As Verilog Or Systemverilog.
Experience With Verification Tools And Methodologies For Functional And Formal Verification, Such As Simulation, Formal Verification, And Constrained-Random Testing.
Debugging
Regression
SystemVerilog
Coverage analysis
Formal Verification
Functional Coverage
Testbench Development
Verilog Coding
Gate-Level Simulation
Assertion-Based Verification
Uvm Methodology
Communication
Conflict Resolution
Leadership
Time management
creativity
Attention to detail
Teamwork
Adaptability
Problem-Solving
Empathy
According to JobzMall, the average salary range for a ASIC Design Verification Engineer is between $93,000 and $140,000 per year. However, this can vary depending on factors such as location, experience, and the specific company or industry. Some senior level positions may offer salaries upwards of $200,000 per year. It is important to research and negotiate salary based on your specific skills and experience.
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Broadcom Inc. is an American designer, developer, manufacturer and global supplier of a wide range of semiconductor and infrastructure software products, Broadcom's product portfolio serves the data center, networking, software, broadband, wireless, and storage and industrial markets.
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